Tech Lead, Digital Design Engineer
Core
Senior Digital Design Engineer developing micro-architecture and front-end circuit design for high-performance network controllers.
Role type
Senior IC Digital Design Engineer (Network ASIC)
Builds
High-performance network controller ASICs (Switch, Server, Storage)
Domain
Semiconductor / High-speed Interconnects
Required skills
RTL design, Synthesis, IP integration, Block-level verification, High-speed protocol knowledge (PCIe, Ualink, Ethernet), DFT, UVM, Silicon bring-up/debug, Small-geometry CMOS design
Preferred skills
Python scripting, PCIe/Ethernet Switch product experience
Technologies
Synopsys, Cadence, UVM, PCIe, Ualink, Ethernet, CXL, NVLink, PCIe, UALink
Responsibilities
Develop micro-architecture and front-end circuit design; Perform RTL, synthesis, and block-level verification; Own blocks from architecture to GDS; Execute silicon bring-up and debug.
Seniority
Senior, hands-on IC
