Chip Lead, Senior Director
Core
Drive end-to-end success of next-generation UALink switching products for rack-scale AI and hyperscale data centers.
Role type
Senior Director / Associate Vice President, Product Technical Lead (Chip Lead)
Builds
UALink, UCIe, and PCIe Gen6/Gen7 switching products
Domain
Semiconductor / High-speed interconnects / AI Infrastructure
Deliverable
production ML models
Required skills
Large-scale chip development (300-400mm²), 2.5D/3D advanced packaging, chiplet-based architectures, RTL design, design verification, DFT, physical design, high-speed serial interfaces (PCIe, Ethernet), executive technical leadership
Preferred skills
UALink, UCIe, PCIe Gen5/Gen6/Gen7, advanced process nodes (7nm, 5nm), power management, clocking architectures, high-speed analog integration
Technologies
UALink, UCIe, PCIe Gen6/Gen7, 2.5D/3D packaging, 7nm/5nm nodes
Responsibilities
Own full technical lifecycle from architecture to customer enablement; Drive chip development from RTL to GDSII; Lead development of large-scale chips using advanced packaging; Partner with verification teams on coverage and sign-off; Collaborate with DFT teams on test strategies; Work with physical design teams on timing and power; Establish scalable processes and mentor engineering teams
Seniority
Senior Director, hands-on IC with executive leadership
