Design / DFT Director (NVE Engineering)
Core
Lead global DFT strategy, architecture, and execution for advanced NAND Flash products, integrating AI/ML and data analytics to optimize testability, diagnostics, and silicon learning.
Role type
Senior leadership IC (Director)
Builds
Scalable testability, diagnostic, design-for-debug, and embedded test solutions for NAND Flash memory
Domain
Semiconductor / Memory / Non-Volatile NAND
Deliverable
production ML models
Required skills
DFT architecture, NAND design, verification, test flow optimization, AI/ML strategy, data analytics, Python, C/C++, people leadership
Preferred skills
Memory test algorithms, embedded self-test/diagnostics, production test optimization, leading distributed teams
Technologies
Python, C/C++, AI/ML frameworks, EDA tools
Responsibilities
Define global DFT vision and technical roadmap; own DFT architecture and coverage closure; partner with Design and Manufacturing to improve yield and time-to-market; drive AI/ML adoption for test-pattern optimization and yield prediction; build and develop a high-performing global DFT organization
Seniority
Director, hands-on IC with people leadership