Intern - Advanced Packaging TD
Core
Intern supporting the development of next-generation interconnect technologies and advanced packaging solutions to improve semiconductor performance and reliability.
Role type
Intern, Advanced Packaging Technology Development (TD)
Builds
Next-generation interconnect technologies, hybrid bonding, micro bump technology, Through-Silicon Vias (TSV), and thermal management solutions.
Domain
Semiconductor manufacturing, Advanced Packaging, Interconnect technologies
Deliverable
production ML models
Required skills
Structured problem-solving (Kepner-Tregoe), Design of Experiments (DoE), Statistical analysis, Data extraction, JMP or comparable analytics tools, AI and Code Assist for Agent-based solutions
Preferred skills
Semiconductor process technologies (BEOL, advanced interconnect), Thermal management, Academic research in advanced packaging
Technologies
JMP, AI, Code Assist, Agent-based solutions
Responsibilities
Lead structured problem-solving activities to address process and yield challenges; Define and analyze Design of Experiments (DoE); Analyze process, line-monitoring, and yield data; Present technical findings to engineering teams; Apply AI and Code Assist to develop Agent-based solutions.
Seniority
Intern