NCG ENGINEER – HBM LAYOUT
Core
IC layout design for High Bandwidth Memory (HBM) leaf cells, standard cells, and sub-blocks to support AI and high-performance computing applications.
Role type
IC Layout Design Engineer
Builds
HBM memory solutions for intensive applications like AI and HPC
Domain
Semiconductor / Memory / High Bandwidth Memory
Required skills
IC layout design, DRC/LVS interpretation, electronic circuit concepts, physical verification, problem-solving
Preferred skills
Analog circuit design, MOS fundamentals, semiconductor fabrication knowledge, scripting (C++/Python), AI-enabled automation methodologies
Technologies
Cadence VLE/VXL, Siemens/Mentor Graphics Calibre
Responsibilities
Craft and develop IC layouts for leaf cells, standard cells, and sub-blocks; Interpret DRC, LVS, and physical verification results; Collaborate with global engineering teams
Seniority
Junior, recent graduate
