Advanced Package Design Engineer – Principal Engineer
Core
Lead a 2.5D/3D Advanced Package Design team to build scalable methodologies and flows for next-generation high-performance compute (HPC) and Datacenter products.
Role type
Principal Engineer (Team Lead)
Builds
Scalable 2.5D/3D package design methodologies, flows, and production-quality design solutions for complex multi-die products.
Domain
Semiconductor packaging / 3DIC / HPC
Required skills
2.5D/3D package architecture, silicon interposer/bridge design, chiplet/HBM integration, EDA ecosystem evaluation, team building and mentorship, design flow automation, multi-physics analysis, cross-functional co-design leadership
Preferred skills
Master's degree or Ph.D. in Electrical Engineering
Technologies
TSMC 3Dblox, Cadence, Siemens EDA, Synopsys, Ansys, Python, Tcl, Perl, shell
Responsibilities
Build and mentor a high-performing 2.5D/3D package design team; Own strategy and deployment of end-to-end design methodologies; Develop standardized flows from planning to tapeout; Lead implementation of advanced integration technologies; Evaluate and deploy foundry/EDA 3DIC solutions; Define tool requirements and drive technical alignment with vendors; Establish design-flow architecture and verification signoff requirements; Guide package architecture and physical implementation; Partner with silicon architecture, SoC, and manufacturing teams for co-design; Lead execution from feasibility to production release; Engage foundries and OSATs for production readiness; Develop team capability plans and technical career paths; Represent the team in executive reviews.
Seniority
Principal, hands-on IC with team leadership
