Design Engineer, Senior Staff/Manager
Core
Define, model, design (digital and/or analog), optimize, verify, validate, implement, and document IP (block/SoC) for high performance, high quality, low power world class products.
Role type
Senior Staff/Manager ASIC Design Engineer
Builds
Digital and analog IP blocks, SoCs, and microarchitectures for Qualcomm products
Domain
Semiconductors / ASIC Design
Required skills
RTL design, Digital IP architecture, SoC Microarchitecture, Clock and reset design, Interconnect Bus protocols (AHB, AXI), SoC integration, PLDRC, CDC, Large scale SoC integration
Technologies
RTL, AHB, AXI
Responsibilities
Define, model, design, optimize, verify, validate, implement, and document IP blocks and SoCs; Collaborate with cross-functional groups to determine product execution path
Seniority
Senior Staff/Manager, hands-on IC
