Staff / Senior Staff Engineer - ASIC / NoC SoC deployment architect - Qualcomm - Guyancourt, France
Core
Deploy and support custom-built interconnect hardware IPs, software tools, and verification methodologies to enable SoC integration teams to assemble SoCs with desired Power Performance Area (PPA) characteristics.
Role type
Staff / Senior Staff Engineer (ASIC/NoC SoC Deployment Architect)
Builds
SoC infrastructure and interconnect solutions for Qualcomm portfolio (Mobile, Automotive, Servers, IoT, Connectivity)
Domain
Semiconductor / SoC Design / Interconnects
Required skills
SoC architecture, RTL design and verification, interconnect protocols (AHB/AXI/ACE/CHI/NoC), system-level features (memory-mapping, MMUs, QoS, cache, security), silicon debug, Python & Perl scripting
Preferred skills
SoC high-speed protocols, chiplet architectures, coherency protocols
Technologies
AHB, AXI, ACE, ACE-Lite, CHI, NoC, Python, Perl
Responsibilities
Collaborate with experts across Architecture, HW, SW, and Verification teams; define interconnect requirements and configuration; provide technical support for new QITC solutions; resolve NoC micro-architecture and integration issues; define new solutions and improvements; develop technical material and organize trainings
Seniority
Staff / Senior Staff, hands-on IC
