CareerPlan

GPU Design Implementation Methodology Engineer

San Diego, California, United States of AmericaFull-time2026-10-23 → 2026-11-10

Core

Develop and drive advanced design methodologies, infrastructure, and automation for synthesis, Static Timing Analysis (STA), power, and physical design using AI methodologies to improve Power, Performance, and Area (PPA) in GPU silicon.

Role type

Senior IC methodology engineer (ASIC/GPU)

Builds

Scalable design infrastructure, automation frameworks, and reusable methodologies for GPU ASIC implementation.

Domain

Semiconductor / VLSI / GPU Design

Deliverable

production ML models

Required skills

Python/TCL scripting, ASIC implementation flows, RTL synthesis, STA, power analysis, physical design, data analytics, debugging, AI/LLM framework development

Preferred skills

EDA tool expertise, design-data analytics, clock structure analysis, AI agent workflows, advanced-node VLSI challenges

Technologies

Python, TCL, EDA tools, AI/LLM frameworks

Responsibilities

Develop scalable design infrastructure and automation; apply methodologies to real design challenges for PPA improvements; collaborate with synthesis, STA, physical design, and power teams; investigate complex design problems and develop tool-agnostic solutions; translate large volumes of design data into actionable insights; develop agentic framework workflows for engineering analysis.

Seniority

Senior, hands-on IC