Design Verification - Senior Staff Engineer
Core
Lead and execute verification plans for System-on-Chip (SOC) blocks including CPU, DDR, Multimedia, Interconnects, Security, Peripherals, and Power.
Role type
Senior Staff IC Design Verification Engineer
Builds
SOC level verification from specification phase to tape out
Domain
Semiconductor / Hardware Engineering
Required skills
System Verilog, UVM, C, Python, Perl, simulation, emulation, formal verification, microarchitecture, SOC integration
Preferred skills
low-power design verification, performance verification, machine learning-based verification
Technologies
System Verilog, UVM, C, Python, Perl
Responsibilities
Lead and execute verification plans for various blocks within the SOC; Develop and enhance testbenches and verification environments using advanced automation techniques; Collaborate with design and architecture teams to identify and resolve specification gaps; Lead SOC level verification activities from Specification phase to tape out; Mentor and guide junior verification engineers; Continuously improve verification processes and methodologies
Seniority
Senior Staff, hands-on IC with technical leadership
