CareerPlan

CPU Integration & 3DIC CAD Engineer

Santa Clara, California, United States of AmericaFull-time$176k–$263k2026-09-17 → 2026-11-10

Core

Build and support implementation tools and flows for custom CPUs to ensure industry-leading power, performance, and area, specifically enabling 3DIC/multi-die architectures.

Role type

Senior IC CPU Integration & 3DIC CAD Engineer

Builds

Custom CPU designs with 3DIC/multi-die architectures

Domain

Semiconductor / CPU Design / 3DIC

Required skills

3DIC/multi-die flow development, TSV implementation, Static Timing Analysis, Power Integrity analysis, EDA tool integration, Python, Tcl

Preferred skills

High-performance chip design experience, Innovus, Primetime, Star-RC, advanced technology nodes (5nm or lower)

Technologies

Innovus, Primetime, Star-RC, Python, Tcl

Responsibilities

Enable 3DIC/multi-die flows (TSV implementation, Static Timing/Extraction, Power Integrity), architect and maintain flows, resolve project-specific issues, work with EDA vendors on roadmap and tool issues

Seniority

Senior, hands-on IC