FPGA Emulation Engineer, Staff
Core
Define, model, design, optimize, verify, validate, implement, and document IP (block/SoC) development for high performance, high quality, low power products.
Role type
Staff ASIC Engineer (Digital/Analog)
Builds
High performance, low power ASIC blocks and SoCs
Domain
Semiconductor / ASIC Design
Required skills
ASIC design, verification, validation, integration, RTL to GDS flow, Virtuoso, system-level architecture, circuit specifications, logic design, EDA tools
Preferred skills
Architecture and design tools, scripting tools and programming languages, design verification methods, interaction with senior leadership
Technologies
Virtuoso, RTL, GDS
Responsibilities
Create advanced architectures, circuit specifications, logic designs, and system simulations; Collaborate across functional teams to develop implementation strategies; Evaluate complex process flow from high-level design to synthesis, place and route, timing, and power use; Write and review detailed technical documentation for complex EDA/IP/ASIC projects.
Seniority
Staff, hands-on IC with mentorship
