CareerPlan

Memory Mask Layout Designer

Tijuana, Baja California, MexicoFull-time2026-08-03 → 2026-11-10

Core

Creating physical layouts for SRAM and custom memory blocks using industry-standard CAD tools.

Role type

Entry-level IC layout designer

Builds

Custom memory blocks (SRAM) for semiconductor chips

Domain

Semiconductor / IC Design

Required skills

CAD tools (Cadence Virtuoso), DRC, LVS, ERC, CMOS technology, IC design principles, Design Management software

Preferred skills

Parasitic effects, reliability considerations, scripting (SKILL, Python), advanced process nodes (FinFET, GAA)

Technologies

Cadence Virtuoso, SKILL, Python

Responsibilities

Create physical layouts for SRAM and custom memory blocks; Perform layout verification (DRC, LVS, ERC); Collaborate with circuit designers to ensure performance and manufactability; Maintain layout database; Track design schedules and report status; Solve design and PDK issues.

Seniority

Entry-level