Wireless R&D IP Verification Engineer, Senior Staff
Core
Define and own verification strategy for IP/Block/Subsystem-level Design Verification (DV) for wireless systems.
Role type
Senior Staff IC IP Verification Engineer
Builds
Wireless IP blocks, Modem PHY, DSP blocks, and related subsystems for next-generation connected devices.
Domain
Semiconductor / Wireless Communications / Hardware Verification
Required skills
SystemVerilog, UVM, Coverage-driven verification, Assertion-based verification, Constraint-random testing, Debugging (Verdi), Formal/static verification, Gate-Level Simulation (GLS), Python/Perl scripting
Preferred skills
Wireless IP exposure (Wi-Fi, Modem PHY, DSP), Power-aware verification
Responsibilities
Define and own verification strategy for IP/Block/Subsystem-level DV; Guide the team in developing robust verification environments and methodologies; Oversee end-to-end DV tasks including design analysis, verification planning, testbench development, simulation, and coverage closure; Mentor junior engineers in technical growth and best practices.
Seniority
Senior Staff, hands-on IC with mentorship responsibilities
