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Senior Engineer - HIG HBM PSE - Design Validation

Boise, ID - Main Site💼 Full-time🗓 2026-09-03 → 2026-09-25

Core

Design Validation Product Engineer for High Bandwidth Memory (HBM) technology, responsible for silicon validation, debugging, and qualification of next-generation HBM products for Machine Learning and AI applications.

Role type

Senior IC Design Validation Engineer (Semiconductor)

Builds

High Bandwidth Memory (HBM) packages integrating DRAM and logic chips via TSV technology

Domain

Semiconductor / Memory / Machine Learning & AI

Deliverable

production ML models | product features

Required skills

HBM architecture knowledge, JEDEC specifications, schematic design, layout knowledge, silicon validation, hardware/software debugging, circuit simulation, data analysis, pattern manipulation

Preferred skills

VLSI coursework, semiconductor process knowledge, Python, C/C++, Verilog, VHDL, System Verilog

Technologies

TSV, DRAM, Logic chips, Gate-level design, RTL, Verilog, VHDL, System Verilog, Python, C/C++

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