CareerPlan

New College Grad - Product Yield Enhancement Engineer, HBM

Boise, Idaho, United States of AmericaFull-time2026-07-17 → 2026-11-10

Core

Analyze failures from production test, qualification, and customer returns using electrical, physical, and data-driven techniques to identify root causes in HBM fabrication and assembly.

Role type

Junior IC product yield enhancement engineer (failure analysis)

Builds

Next-generation High Bandwidth Memory (HBM) products

Domain

Semiconductor manufacturing (HBM)

Deliverable

production ML models

Required skills

Electrical failure analysis, Physical failure analysis (PFA), Root cause analysis, Semiconductor device physics, VLSI design principles, UNIX/Linux scripting (Tcl, Bash, Shell), CAD (layout/schematic analysis), Data modeling

Preferred skills

Fault isolation techniques, Semiconductor packaging knowledge, Reliability engineering methodologies, AI-assisted analytics

Technologies

Emission microscopy, Laser-based methods, EOTPR, AI-assisted tools

Responsibilities

Perform electrical failure analysis and fault isolation; Analyze and model failure signatures from backend testing and RMA data; Apply physical failure analysis and de-processing techniques; Develop deep technical knowledge of CMOS/FinFET processes; Generate failure analysis reports; Collaborate with cross-functional teams; Apply AI-assisted tools to analyze large datasets

Seniority

Junior, entry-level IC