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Engineer, Design

Avezzano, L'Aquila, Italy💼 Full-time💰 $34,000–$57,000🗓 2026-06-10 → 2026-09-26

Core

Define, implement, and optimize DFT architectures and test strategies for advanced NAND Flash memory products, ensuring compliance with quality, reliability, and manufacturability requirements.

Role type

Design Engineer (Design for Test - DFT)

Builds

Advanced NAND Flash memory products

Domain

Semiconductor / Memory Storage / Digital Logic

Deliverable

production ML models | product features | dashboards & analysis | research | client delivery | infrastructure | physical/clinical work

Required skills

DFT architecture design, test strategy development, digital design verification, C/C++ programming, Python programming, simulation and validation methodologies, block and chip level verification

Preferred skills

NAND Flash technology experience, design automation scripting, AI-assisted design approaches, silicon validation and debug, yield analysis, wafer and package level testing

Technologies

C, C++, Python, NAND Flash, Digital Logic, Custom Circuits, Firmware

Responsibilities

Define and optimize DFT architectures for NAND designs; Analyze testability and coverage; Develop and validate test sequences and algorithms; Collaborate on DFT integration and silicon bring-up; Document DFT methodologies and results

Seniority

Mid-Senior, hands-on IC

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