NAND PI Design Rule Snr Engineer
Core
Define physical design rules for Non-Volatile Memory (NVM) technologies from conception to production, ensuring accuracy and feasibility across layout and mask generation.
Role type
Senior IC Physical Design Rule Engineer
Builds
Physical design rules, mask data, and layout architectures for NVM products
Domain
Semiconductor manufacturing / Non-Volatile Memory (NVM)
Required skills
Physical design rule definition, Process integration coordination, Layout and architecture feasibility evaluation, Design rule checking (DRC), Mask data generation algorithms, Multi-disciplinary team collaboration
Preferred skills
NVM technology expertise, Mask data generation, Physical verification interaction
Technologies
DRC tools, Mask data generation systems, Layout design tools
Responsibilities
Define physical design rules for current and future NVM technologies, Interact with process integration team to ensure DR accuracy, Evaluate layout and architecture feasibility with design teams, Support DRC of base and mask layers, Define algorithms for mask data generation, Lead projects on layout and mask generation issues
