Senior Staff ASIC CAD Flow Infrastructure Engineer
Core
Define scalable EDA methodologies, automation frameworks, and design flows for next-generation ASIC design infrastructure to enable efficient SoC development.
Role type
Senior Staff IC ASIC CAD Flow & Infrastructure Engineer
Builds
Scalable EDA methodologies, automation frameworks, flow orchestration systems, dashboards, analytics, and monitoring tools
Domain
Semiconductor / ASIC Design / EDA Infrastructure
Deliverable
production ML models | product features | infrastructure
Required skills
ASIC/SoC development lifecycle knowledge, Python scripting, Tcl scripting, Linux development environments, commercial EDA tool support (Synopsys, Cadence, Siemens EDA), data analytics, telemetry, AI-assisted design methodologies
Preferred skills
Advanced automation framework design, cross-functional leadership, AI-assisted design methodologies
Technologies
Python, Tcl, Shell, Linux, Synopsys, Cadence, Siemens EDA
Responsibilities
Develop and maintain CAD frameworks; Build flow orchestration systems, dashboards, analytics, and monitoring tools; Develop and maintain automation frameworks for integrating standard-cell libraries, memory macros, and IP blocks; Establish best practices for synthesis and physical implementation; Develop standardized flow frameworks that maximize reusability, maintainability, and automation
Seniority
Senior Staff, hands-on IC with strategic impact
