Staff Design Verification Engineer, UAL and PCIe Subsystems
Core
Develop functional verification environments, reference models, and bus monitors/drivers for high-speed data transfer chips (UAL and PCIe subsystems) to ensure designs meet customer specifications.
Role type
Staff Design Verification Engineer
Builds
Production verification environments and tools for multi-core SoCs
Domain
Semiconductor / Hardware Verification / Networking Protocols
Deliverable
production ML models | product features | dashboards & analysis | research | client delivery | infrastructure | physical/clinical work
Required skills
System Verilog, UVM, Python, Perl, C++, ARM assembly, Object-Oriented Design, Linux OS, random verification techniques, coverage analysis
Preferred skills
Networking protocols understanding
Technologies
System Verilog, UVM, Python, Perl, C++, ARM assembly, EDA Verification tools
Responsibilities
Develop architecture for functional verification environments including reference models and bus-functional monitors; Write verification test plans using random techniques and coverage analysis; Debug failures and resolve issues with designers; Verify boot code and maintain tools for multi-core SoCs; Transform engineering requirements into scalable software tools; Perform unit and regression testing of software tools
Seniority
Staff, hands-on IC with strategic oversight
