Distinguished Engineer - SoC Verification
Core
Lead design verification (DV), emulation, and post-silicon validation for advanced AI, XPU, and custom SoC initiatives, establishing verification strategy and culture from the ground up in a new San Diego design center.
Role type
Distinguished Engineer - SoC Verification (Technical Leadership)
Builds
High-quality customer silicon for next-generation compute platforms (AI, XPU, XPU-Attach)
Domain
Semiconductor / SoC Design Verification / AI Infrastructure
Deliverable
production ML models | product features
Required skills
SystemVerilog, UVM, Python, Perl, C++, ARM assembly, Linux OS, Object-Oriented Design, Networking protocols, DV methodology definition, TB architecture design, Tool evaluation, Team building and hiring
Preferred skills
Experience building verification environments from scratch, adapting to industry DV trends
Technologies
SystemVerilog, UVM, Python, Perl, C++, ARM, Linux
Responsibilities
Lead DV, emulation, and post-silicon validation execution; Define DV scope, timelines, and methodologies; Drive TB architecture definition and implementation; Collaborate with Architecture, Design, DFT, PD, FW, and system teams; Lead tool evaluation and selection; Drive continuous productivity improvements; Hire, build, and retain high-performance engineering teams; Address team training and development needs
Seniority
Distinguished Engineer, Technical Leadership & Strategy
