Senior Principal - DFT
Core
Define and implement design strategies to maximize test coverage and optimize test cost for embedded MCU/DSP and mixed-signal systems.
Role type
Senior Principal Design For Test (DFT) Staff Engineer
Builds
Semiconductor products including MCUs, DSPs, and hardware accelerators
Domain
Semiconductor / VLSI Design / Mixed-Signal
Deliverable
production ML models | product features | dashboards & analysis | research | client delivery | infrastructure | physical/clinical work
Required skills
VLSI design for test, mixed-signal product development, technical leadership, embedded CPU hardware/software/firmware knowledge, strategic design trade-off analysis, EDA tool solutions, analog parameter testing, test intent definition, analog design practices
Preferred skills
Design of test for digital and mixed-signal circuits, tester requirements awareness, design vs. test-cost trade-off analysis
Technologies
EDA tools, embedded CPUs, mixed-signal circuits, analog circuits
Responsibilities
Define and implement design strategies to maximize test coverage across products, Identify novel solutions for optimizing test cost and coverage, Guide world-wide teams in technical areas of test strategies all the way to productization
Seniority
Senior, hands-on IC with strategic leadership