2027 Packaging Engineer
Core
Design, develop, and analyze semiconductor packaging technologies (Wirebond, Flip Chip, Modules, SIPs) to enable differentiation for TI's analog and embedded processing products.
Role type
Junior IC packaging engineer (new college graduate)
Builds
Semiconductor packaging solutions for analog and embedded processing products
Domain
Semiconductor manufacturing and packaging
Deliverable
production ML models | product features
Required skills
Semiconductor packaging design, electrical/mechanical/thermal modeling, design-of-experiments, material downselection, reliability analysis, yield optimization
Preferred skills
Statistical process control (SPC), manufacturing process knowledge, assembly knowledge, reliability testing, materials characterization, failure analysis (FA)
Technologies
Wirebond, Flip Chip, Modules, SIPs
Responsibilities
Partner with businesses to design and develop internal and external packaging solutions; Participate in cross-functional teams supporting product qualification and production; Conduct electrical, mechanical, and thermal models to comprehend silicon-to-package interaction; Direct design-of-experiments and work with material suppliers to downselect innovative packaging materials
Seniority
Junior, new college graduate
