Physical Design Engineer
Core
Physical design of complex mixed-signal SoC/ASIC blocks for audio applications, taking RTL through synthesis to tape-out.
Role type
Digital Physical Design Engineer
Builds
Highly complex mixed-signal devices for audio applications
Domain
Semiconductor / Analog ICs and embedded processors
Deliverable
production ML models | product features | dashboards & analysis | research | client delivery | infrastructure | physical/clinical work
Required skills
RTL design, logic synthesis, floorplanning, placement, clock tree synthesis (CTS), routing, static timing analysis (STA), DRC, LVS, IR drop, EM analysis, scripting (Tcl/Perl/Python), CMOS/VLSI fundamentals, PPA optimization
Preferred skills
RTL coding, Digital QC (RDC/CDC/Lint), audio signal chain knowledge, I2C, ASI/TDM, memory architecture, FPGA
Technologies
Cadence Innovus, Tempus, Voltus
Responsibilities
Execute RTL-to-GDSII physical design flow, perform timing closure across multiple corners, conduct physical verification, provide EDA flow automation support, collaborate with RTL/verification/architecture teams, contribute to design reviews and sign-off processes
Seniority
Mid-level (2-5 years experience)