Senior Circuit Design Engineer
Core
Design, develop, and test advanced ASIC subsystems and reusable IP for high-performance networking silicon, focusing on power, performance, area, and reliability.
Role type
Senior IC ASIC Circuit Design Engineer
Builds
High-performance ASIC subsystems and reusable IP for Cisco Silicon One (top-of-rack switches to web-scale data centers)
Domain
Semiconductor / ASIC Design / Networking Hardware
Required skills
ASIC circuit design, custom digital design, analog/mixed-signal design, transistor-level simulation, EDA flow automation, physical implementation, advanced process nodes (FinFET/GAA), Python/Tcl scripting
Preferred skills
Low-power cell design, SPICE/PVT/Monte Carlo analysis, Liberty/CCS/ECSM modeling, DRC/LVS/EM/IR analysis, silicon bring-up and failure analysis, technical leadership
Technologies
Cadence, Synopsys, Siemens, Python, Tcl, shell, FinFET, GAA
Responsibilities
Drive architecture and implementation of ASIC subsystems from spec to validation; Develop custom digital and analog/mixed-signal IP; Perform transistor-level simulation and optimization; Define characterization methodologies and automate EDA flows; Collaborate on interface requirements and implementation constraints; Own physical implementation optimizing timing, power, and signal integrity; Analyze silicon results to drive design improvements; Lead technical reviews to resolve cross-disciplinary issues; Develop reusable infrastructure and documentation.
Seniority
Senior, hands-on IC
