Physical Design Engineer I (Co-op) - United States
Core
Design, develop, and build ASIC designs for optical communication products, focusing on physical implementation and optimization.
Role type
Co-op Physical Design Engineer (ASIC)
Builds
ASIC designs for optical communication products
Domain
Semiconductor / VLSI / Optical Communications
Required skills
RTL to GDSII design cycle knowledge, Static Timing Analysis, block level synthesis, place and route, PnR tools, signoff tools
Preferred skills
Deep submicron CMOS technologies, scripting (Perl, Tcl, Python, Shell), previous internship experience
Responsibilities
Work with Front-End teams to understand design architecture, perform gate level netlist synthesis, execute physical implementation (floorplanning, placement, CTS, routing), optimize power/performance/area, conduct static timing analysis and signoff closure, perform physical verification and signoff closure, conduct EMIR analysis and signoff closure
Seniority
Co-op / Intern
