ASIC Engineering Technical Leader (onsite)
Core
Define, design, and verify high-performance ASIC and subsystems for Cisco networking platforms, ensuring power, performance, and area goals.
Role type
Senior IC ASIC Engineering Technical Leader
Builds
High-volume ASIC chips and subsystems for Cisco data and infrastructure products
Domain
Semiconductor design (ASIC) / Networking hardware
Deliverable
production ML models | product features
Required skills
ASIC architecture and design, system-level debugging, verification strategy definition, electrical interface planning, design methodology leadership, vendor coordination, reusable code development
Preferred skills
Experience with full chip timing closure, physical implementation (PI/PV), first test vehicle development
Technologies
ASIC design flows, verification environments, electrical planning tools
Responsibilities
Manage definition, architecture, and design of high-performance ASICs; Own applications or multiple complex functional areas; Define verification strategies; Coordinate with stakeholders to integrate into PD and DV flows; Lead technical expertise of a physical design function; Interface with vendors and design leads on timing closure and physical implementation
Seniority
Senior, hands-on IC with leadership responsibilities
