Analog/mixed-signal IC Design Engineer - Acacia (Hybrid)
Core
Design high-speed (>25Gb/s) analog circuits for optical communications products (100G-1.6T+) used in data center and telecom networks.
Role type
Senior IC Design Engineer (Analog/Mixed-Signal)
Builds
Ultra-deep sub-micron CMOS ASICs for high-speed serial links and transceivers
Domain
Optical communications / High-speed analog IC design
Required skills
High-speed serial link design, Output drivers, Phase Locked Loops (PLL), Clock transmission, Opamps, Equalization techniques, CMOS design, Layout, Simulation, Measurement
Preferred skills
FinFET/GAA technologies, High-frequency layout, Design for manufacturability, Lab validation, Cadence Virtuoso/Spectre, Calibre, EMX, Matlab
Responsibilities
Design and layout ultra-deep sub-micron CMOS products, Lead design blocks on complex chips, Perform peer reviews, Collaborate on signal/power integrity specifications
Seniority
Senior, hands-on IC
