ASIC Engineering Technical Leader
Core
Lead the entire package design process for high-performance ASICs, optimizing pinouts, stack-ups, and power distribution to ensure manufacturability and performance.
Role type
Senior IC ASIC Package Design Technical Leader
Builds
High-speed, robust, and scalable silicon packages for next-generation networking ASICs
Domain
Semiconductor / Networking / Hardware Design
Required skills
High-speed signal design, Power distribution networks (PDN), PCB design, EDA tools for layout, Package pinout optimization, High-speed routing, Vendor management, Design methodology development
Preferred skills
ASIC package design experience, Silicon floor planning, Signal integrity (SI) and Power integrity (PI) considerations, Testing and measurement equipment usage, Scripting (Python, Perl, TCL, shell), Team leadership
Technologies
EDA tools, Oscilloscopes, TDR/VNA analyzers
Responsibilities
Lead package design tasks from concept through implementation, Optimize package pinouts and power distribution, Collaborate with silicon floor planning and SI/PI teams, Work with layout editors to deliver high-quality designs, Enhance design methodologies and partner with vendors, Drive innovation in package solutions
Seniority
Senior, hands-on IC with leadership responsibilities
