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Senior FPGA/ASIC Verification Engineer

Bangalore, India💼 Full-time🗓 2026-06-29 → 2026-07-31

Core

Lead verification engineering for high-performance FPGA and ASIC designs, focusing on data-path and control-path verification to ensure bug-free RTL for first-pass board success.

Role type

Senior IC FPGA/ASIC Verification Engineer

Builds

Next-generation, high-performance FPGA and ASIC products for Cisco's networking solutions

Domain

Networking hardware (FPGA/ASIC)

Deliverable

production ML models | product features

Required skills

Verilog, System Verilog, UVM/VMM, constrained random testing, coverage planning, debugging, OOPs

Preferred skills

Ethernet protocols, PCIe, AXI, memory controllers, OTN, VCS simulation flow, assertions

Responsibilities

Lead and mentor verification engineers, develop robust test benches and coverage plans, collaborate with architects and designers on system-level requirements, ensure product reliability and performance

Seniority

Senior, hands-on IC with mentorship

Rewrite
## Meet the Team We are part of the Hardware Platform Group, with our team specializing in FPGA verification. Our work spans both sophisticated data-path and challenging control-path FPGAs. The verification process includes crafting the DV architecture, test plan, and coverage plan, all the way through to final DV sign-off. We leverage industry-standard tools for simulation, linting, coverage, and assertions, incorporating various quality metrics to ensure a robust process. Our ultimate goal is to deliver bug-free RTL for first-pass success on the board. Additionally, we collaborate closely with our remote teams based in SJC and India. ## Your Impact - Lead and mentor a team of verification engineers, driving the development of robust test benches, coverage plans, and constrained random tests. - Ensure high-quality and reliable FPGA/ASIC designs through sophisticated verification techniques and comprehensive debugging. - Contribute to the adoption and evolution of ground breaking verification methodologies like UVM/VMM, improving team efficiency and performance. - Partner with architects, logic designers, and software engineers to align on architecture, micro-architecture, and system-level requirements. - Play a pivotal role in delivering next-generation, high-performance FPGA and ASIC products for Cisco’s networking solutions. - Ensure product reliability and performance, strengthening Cisco’s reputation and customer trust in its hardware solutions. ## Minimum Qualifications - Bachelor's Degree / Master's Degree in Electrical or Computer Engineering with 7+ years of experience in design verification. - Proficiency in OOPs, Verilog & System Verilog. - Confirmed verification skills : FPGA, planning, problem solving, debug, adversarial testing and random testing - Project based work experience with UVM/VMM methodologies. - You will have experience with architecting the testplan & test bench. ## Preferred Qualifications - Hands on experience with Ethernet based protocols, PCIe, AXI, memory controllers, OTN etc. will be an added advantage. - Familiarity with VCS simulation flow, knowledge of coverage & assertions is desirable. ## Why Cisco? At Cisco, we’re revolutionizing how data and infrastructure connect and protect organizations in the AI era – and beyond. We’ve been innovating fearlessly for 40 years to create solutions that power how humans and technology work together across the physical and digital worlds. These solutions provide customers with unparalleled security, visibility, and insights across the entire digital footprint. Fueled by the depth and breadth of our technology, we experiment and create meaningful solutions. Add to that our worldwide network of doers and experts, and you’ll see that the opportunities to grow and build are limitless. We work as a team, collaborating with empathy to make really big things happen on a global scale. Because our solutions are everywhere, our impact is everywhere. We are Cisco, and our power starts with you.
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