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ASIC DFx & Test Architect Lead

3 Locations💼 Full-time💰 $210,600–$210,600🗓 2026-06-26 → 2026-07-31

Core

Define, design, and verify ASIC and ASIC subsystems for Cisco's core Switching, Routing, and Wireless products, focusing on DFx & test solutions and architectures.

Role type

Senior IC ASIC DFx & Test Architect Lead

Builds

ASIC subsystems and comprehensive DFx & test solutions for high-volume production

Domain

Semiconductor hardware design, ASIC development, and test engineering

Deliverable

production ML models | product features | dashboards & analysis | research | client delivery | infrastructure | physical/clinical work

Required skills

ASIC hardware development, DFx and test standards/techniques, silicon life cycle management, high-speed IO test and diagnosis, RTL implementation, design verification

Preferred skills

Hardware design specifications, verification plan/matrix creation, RTL QA checks (lint & CDC)

Technologies

ASIC, RTL, high-speed IO, ATE, in-system test

Responsibilities

Develop comprehensive DFx & test solutions and architectures supporting ATE screening, in-system test, debug, and diagnostics; Lead RTL implementation from architecture specifications; Drive reusable test and debug methodologies for leading-edge technology nodes

Seniority

Senior, hands-on IC

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