<Data Center>DFT Architect for Data Center ASIC products
Core
Define DFT architecture specifications to enhance ATE and production test environments, optimize test costs, and improve quality across MTK ASIC product portfolios.
Role type
DFT Architect
Builds
ATE and production test environments for MTK ASIC products
Domain
Semiconductor / ASIC Design
Deliverable
production ML models | product features | dashboards & analysis | research | client delivery | infrastructure | physical/clinical work -> infrastructure (test environments)
Required skills
DFT architecture definition, ATE optimization, test cost reduction, yield improvement strategy, design collaboration, cross-functional leadership
Preferred skills
Manufacturing integration, post-silicon validation, systematic yield improvement
Technologies
ATE, ASIC, MTK product portfolio
Responsibilities
Define DFT architecture specifications, manage end-to-end DFT activities from architecture to test deployment, serve as a key contributor in Global Quality and Operations for manufacturing test solutions, partner with design teams to ensure DFT structure implementation, lead internal DFT teams in developing test solutions, develop plans for diagnosability enhancement and yield improvement
Seniority
Senior, hands-on IC with leadership responsibilities