Package Mechanical Design Engineer
Required skills
Bachelors + 7 years, or Masters + 4 years, or PhD + 1+ years in mechanical engineering or related field
Required skills
Hands-on experience in thermomechanical simulation of semiconductor packages and board-level assemblies
Required skills
Proven experience in solder joint reliability analysis, including fatigue and/or creep modeling
Required skills
Strong experience with FEA tools such as ABAQUS or ANSYS, including nonlinear material modeling
Required skills
Familiarity with CAD tools (e.g., Creo) and GD&T
Required skills
Ability to collaborate across global teams
Preferred skills
5+ years in electronics packaging or board-level reliability (BLR) simulation
Preferred skills
Experience with solder constitutive models (e.g., Anand, viscoplastic models) and fatigue life prediction methodologies
Preferred skills
Knowledge of JEDEC/IPC reliability standards, including thermal cycling, drop, and mechanical testing
Preferred skills
Experience with advanced packaging technologies (flip chip, 2.5D/3D, heterogeneous integration)
Preferred skills
Background in correlation between simulation and reliability test data
Preferred skills
Strong scripting skills for simulation automation and data processing
Technologies
ABAQUS, ANSYS, Creo, Python, Fortran
Responsibilities
Perform advanced finite element analysis (FEA) to evaluate thermomechanical reliability of ASIC packages and board-level assemblies
Responsibilities
Lead solder joint reliability simulations, including thermal cycling, mechanical shock, and vibration
Responsibilities
Model and analyze time-dependent material behavior, including creep, viscoplasticity, and fatigue
Responsibilities
Drive board-level reliability (BLR) assessments, including PCB–package interactions, SMT effects, and system-level constraints
Responsibilities
Correlate simulation results with reliability testing data (e.g., TCT, drop test, field returns)
Responsibilities
Develop and automate simulation workflows using Python, Fortran, or similar tools
Responsibilities
Provide design recommendations and reliability sign-off guidance to cross-functional teams
Responsibilities
Document methodologies, assumptions, and results clearly
Seniority
Senior (7+ years for Bachelor's, 4+ for Master's, 1+ for PhD)
Domain
Semiconductor packaging, ASIC design, electronics reliability, mechanical engineering
