ASIC Engineer || Design Verification || Exp 8+ Years
Core
Define, design, and verify high-performance ASIC subsystems for Cisco platforms, focusing on power, performance, and area goals.
Role type
Senior ASIC Design Verification Engineer
Builds
High-volume, high-quality ASIC subsystems deployed in Cisco networking platforms
Domain
Semiconductor / ASIC Design / Networking Infrastructure
Deliverable
production ML models | product features | infrastructure
Required skills
ASIC design and verification, architecture definition, mixed-signal analog design, EDA flow development, physical design of complex blocks, debugging at ASIC/SW/HW levels, reusable code development, power and signaling solutions
Preferred skills
Experience with analog/mixed signal products, lab bring-up, platform-level code reviews
Technologies
PD EDA flows, mixed-signal design tools, verification methodologies
Responsibilities
Drive definition, architecture, and design of high-performance ASICs; own complex or multiple functional areas; debug issues at ASIC, SW, and HW levels; lead design work by solving block-level issues; define new verification methodologies; own physical design of highly complex blocks; implement power and signaling solutions
Seniority
Senior, hands-on IC
