Digital IC Design Engineer | Custom
Core
Designing digital and mixed-signal circuits for custom ASSP ICs for a marquee customer.
Role type
Senior IC Design Engineer (Digital/Mixed-Signal)
Builds
Custom ASSP ICs
Domain
Semiconductor / Mixed-Signal IC Design
Deliverable
production ML models | product features | dashboards & analysis | research | client delivery | infrastructure | physical/clinical work
Required skills
RTL development and verification, logic synthesis, static timing analysis (STA), clock/reset domain crossing checks (CDC/RDC), formal verification (JasperGold), mixed-signal design understanding, timing verification with Gates+SDF, automation scripting for design/verification/simulation
Preferred skills
Debugging analog and digital behaviors, cross-team collaboration, customer-facing requirements refinement, risk assessment, mentoring team members
Technologies
RTL, Gate level, JasperGold, Gates+SDF
Responsibilities
Develop micro architecture documentation from system specs, drive RTL development and verification, execute logic synthesis and timing constraints, run STA and review design quality, execute CDC/RDC checks, drive design and verification reviews, interact with analog team for chip-level requirements, interact with customers to refine requirements, drive RTL design flow improvement strategies
Seniority
Senior, hands-on IC