Physical Design Manager
Core
Lead the backend methodology and flow development from RTL to GDS for high-quality VLSI designs, providing strategic and technical leadership to a team of engineers.
Role type
Senior IC physical design manager (backend flow)
Builds
High-scale and complex VLSI devices (ASICs)
Domain
Semiconductor / VLSI / Backend Design
Deliverable
production ML models | product features | dashboards & analysis | research | client delivery | infrastructure | physical/clinical work
Required skills
VLSI design, backend design, Place & Route flow, team leadership, chip design lifecycle management
Preferred skills
Physical construction and integration, Physical Design Verification (LVS/DRC), EDA tools (Synopsys, Cadence)
Responsibilities
Guide engineers through the entire chip design lifecycle, manage group output including Definition, Physical Synthesis, Place and Route, Optimization, Timing Closure, and Design Floor Planning
Seniority
Senior, hands-on IC with management responsibilities
