CareerPlan

Design Verification Engineer

Cupertino, United States of AmericaFull-time$174k–$225k2026-11-05 → 2026-11-10

Core

Develop comprehensive test plans, test cases, and coverage plans to validate the functionality and performance of chip designs.

Role type

Senior IC design verification engineer (chip)

Builds

Next-generation verification methodology and test benches for Apple chips

Domain

Semiconductor / Chip Design

Required skills

SystemVerilog, UVM, Python/Ruby/Perl scripting, Cadence Xcelium, Verdi/Indago waveform debugging, UNIX/Linux command-line, algorithmic reference model design, coverage analysis, regression automation

Responsibilities

Review design and architecture specifications to ensure alignment with functional and performance goals; Develop comprehensive test plans, test cases, and coverage plans; Run and triage regressions to identify and resolve issues; Track issues and evaluate coverage data; Collaborate with design, architecture, and software teams to understand use cases and corner conditions; Refine verification methodology and test benches to improve efficiency

Seniority

Senior, hands-on IC