Design Verification
Core
Ensuring the quality of System on Chip (SoC), IP, or subsystems through design verification and test development.
Role type
Senior IC design verification engineer (ASIC/SoC)
Builds
ASICs, SoCs, and embedded microprocessor test environments
Domain
Semiconductor hardware design and verification
Required skills
System Verilog, UVM framework, constrained random verification (CRV), directed testing, C programming for microprocessor tests, test coverage planning, Xcelium/Questa/VCS simulation analysis, Python/Perl scripting
Preferred skills
N/A
Technologies
System Verilog, UVM, Xcelium, Questa, VCS, Python, Perl, C
Responsibilities
Collaborating with design and micro-architecture teams to understand functional and performance goals; Developing test plans, tests, and coverage plans for ASICs; Implementing IP block test environments and test cases; Running regressions, triaging bugs, and analyzing coverage to achieve top results; Utilizing simulation tools to analyze failures and automate test bench analysis.
Seniority
Senior, hands-on IC
