CPU Implementation Engineer
Core
CPU Implementation Engineer focusing on block and full-chip EM/IR and electrical verification, power grid construction, and design optimization.
Role type
Senior IC CPU Implementation Engineer
Builds
CPU blocks and full chips
Domain
Semiconductor / Chip Design
Required skills
C/C++ programming, Perl/Python/TCL scripting, CAD/EDA tools (Cadence Virtuoso, Synopsys ICC), EMIR analysis, Power grid analysis, Static timing analysis, Circuit analysis (HSPICE), Verilog RTL reading
Preferred skills
N/A
Technologies
Cadence Virtuoso, Synopsys ICC, Cadence Voltus, Apache Redhawk, Cadence Tempus, Synopsys Primetime, HSPICE
Responsibilities
Work on block and full-chip EM/IR and electrical verification; Work on power grid and methodologies and implementation; Script using Perl/Python to automate tasks and improve debug efficiency; Work with implementation/CAD team during full design cycle to drive analysis fixes/signoff closure; Analysis and comparison of various tool methodologies to determine the best suited for Power grid construction; Work with the SOC team to meet IP analysis technical and delivery requirements; Work on complex C/C++ code base to do design optimization for power-grid convergence
Seniority
Senior, hands-on IC
