Design Verification Engineer
Core
Develop verification test plans, tools, test benches, protocol monitors, and high-coverage stimulus vectors for large-scale SoCs.
Role type
Senior IC design verification engineer (SoC)
Builds
SoC verification infrastructure and test environments
Domain
Semiconductor hardware design
Required skills
SystemVerilog, UVM, SoC architecture, coverage-driven verification, formal methods, verification infrastructure development, Perl, Python, Verilog, C, C++, TCL
Preferred skills
Storage IP knowledge, control-oriented design, hardware acceleration, scripting
Technologies
SystemVerilog, UVM, Perl, Python, Verilog, C, C++, TCL
Responsibilities
Develop verification test plans, tools, test benches, protocol monitors, and high-coverage stimulus vectors; Apply advanced verification techniques to ensure quality and time-to-market; Work closely with the design team to ensure timely delivery of quality designs.
Seniority
Senior, hands-on IC
