Wireless PHY Design Verification Engineer
Core
Verify sophisticated WiFi PHY digital systems for high-rate, low-power, low-latency wireless features in Apple's SoCs.
Role type
Senior IC design verification engineer (wireless PHY)
Builds
Multi-gigabit wireless silicon for Apple products
Domain
Consumer electronics / Wireless communications
Required skills
SystemVerilog, UVM, constrained random testing, functional coverage, assertion-based verification, ASIC verification flows, DSP subsystem verification, IEEE 802.11 protocol knowledge, bus functional models (BFMs), DPI integration, transaction-level modeling
Preferred skills
Bluetooth/Cellular protocol knowledge, DSP algorithm verification strategies, scoreboarding, packet-based approaches
Responsibilities
Develop UVM environments and BFMs for DSP subsystems; own subsystem verification from test planning to coverage closure; architect constrained random scenarios; apply data-driven verification closure; drive verification strategy with cross-functional teams
Seniority
Senior, hands-on IC
