Design Verification Engineer
Core
Develop verification environments, test benches, and coverage plans for first silicon SoC/IP to ensure bug-free designs.
Role type
Senior IC design verification engineer (SoC/IP)
Builds
First silicon System-on-Chip (SoC) and Intellectual Property (IP)
Domain
Semiconductor hardware design and verification
Deliverable
production ML models
Required skills
Verilog, C, C++, Python, digital design, analog knowledge, chip design flow, scripting (Perl/Python), MATLAB
Preferred skills
N/A
Technologies
Verilog, C, C++, Python, Perl, MATLAB
Responsibilities
Develop detailed test and coverage plans based on micro-architecture; develop verification environments including stimulus, checkers, assertions, and trackers; create block, IP, and SoC level test-benches; debug test failures and enable regression testing; write scripts for data analysis and visualization.
Seniority
Senior, hands-on IC
