Design Verification Engineer for Cellular Baseband (m/f/d)
Core
Design Verification Engineer for cellular baseband modems and RF link controllers in Apple's silicon design group.
Role type
Senior IC design verification engineer (cellular baseband)
Builds
Next-generation cellular systems (baseband modems, RF link controllers) for Apple SOCs
Domain
Semiconductor / Cellular Communications (4G/5G)
Deliverable
production ML models
Required skills
System Verilog, UVM, System C, C/C++, Python, constraint random testing, SVA, coverage-driven verification, test planning, LLMs/MCPs, Python-based automation
Preferred skills
4G/5G physical layer (3GPP), embedded processor core verification, Bus Fabric/NOC/AXI/AHB verification, prompt engineering, C/C++ modeling
Technologies
UVM, System Verilog, Python, LLMs, 3GPP, AXI, AHB, NOC
Responsibilities
Construct detailed test plans and coverage-driven verification plans; Architect reusable UVM test benches; Implement test plans from simulation to sign-off; Debug failures and maintain regressions; Design and implement ML-driven workflows for verification efficiency.
