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Power Integrity Engineer

San Francisco Bay Area, United States of America💼 Full-time🗓 2026-04-30 → 2026-09-28

Core

Develop, implement, and verify Power Integrity solutions for System-on-Chip (SoC) power delivery networks across die, interposer, package, and board levels for Apple devices.

Role type

Senior IC Power Integrity Engineer

Builds

End-to-end Power Delivery Network (PDN) solutions and power supply architectures for SoCs

Domain

Consumer electronics, Semiconductor hardware, Power Integrity

Required skills

Power delivery modeling and simulation, PDN architecture design, Voltage Regulator modeling, Impedance and voltage droop analysis, Lab measurement and correlation, Python coding, Electromagnetic (EM) simulation, Transmission line theory

Preferred skills

AI/ML assisted automation, Advanced droop mitigation schemes, Silicon floorplan feasibility, 3D/2D EM simulation tools, Low-power design methodologies

Technologies

VNA, Real-time scope, Spectrum analyzer, Python, EM simulation tools

Responsibilities

Conduct end-to-end simulation studies for die/interposer/PKG/PCB/PMU to meet impedance and droop specs; Define PDN architecture and design solution space; Perform model-to-hardware correlation on component and system levels; Provide implementation guidelines to silicon, package, and system design teams.

Seniority

Mid-level, hands-on IC

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