CPU Full Chip Physical Integration Engineer
Core
Full chip physical design, integration, and verification for high-performance, low-power processor development.
Role type
Senior IC physical design engineer (CPU)
Builds
High-performance, low-power processor chips
Domain
Semiconductor / CPU design
Required skills
Full chip floorplanning, place and route (PnR), power grid design, EM/IR analysis, formal verification, scripting (Perl/TCL), DRC/LVS verification, STA methodology
Preferred skills
Low power design, custom layout integration, clock specification, DFM, CMOS circuit design, computer architecture
Technologies
Conformal LP, LEC, RedHawk, Calibre
Responsibilities
Own chip-level place and route (PnR) and final layout database construction; develop and validate power grid and routability; drive custom layout integration and electrical verification; work with SOC teams to meet IP delivery requirements; establish physical design methodologies and flows; automate tasks via scripting.
Seniority
Senior, hands-on IC