SoC Physical Design Engineer, PnR
Core
Lead physical design implementation for high-performance, low-power SoCs from RTL to GDS, optimizing timing, area, and power.
Role type
Senior IC SoC Physical Design Engineer (PnR)
Builds
High-performance System-on-Chip (SoC) dies
Domain
Semiconductor / VLSI Design
Required skills
PnR, bump/RDL, STA, physical verification, EMIR, sign-off, timing closure, area optimization, power optimization
Preferred skills
Floorplanning, clock & power distribution, PD construction & analysis flows, large SOC design experience (>20M gates), deep submicron tapeout experience, industry standard tool expertise
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