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CPU Physical Electrical Analysis Engineer

Santa Clara, United States of America💼 Full-time🗓 2026-04-14 → 2026-09-28

Core

Drive block and top-level EMIR/electrical verification closure and power grid design for high performance compute blocks.

Role type

Senior IC physical electrical analysis engineer

Builds

High performance compute blocks (EMIR/SIGEM/Reliability space)

Domain

Semiconductor hardware design

Required skills

PNR design implementation, Static Timing Analysis (STA), power grid design, EMIR verification, CAD/EDA vendor collaboration, SoC level integration

Preferred skills

Computer architecture knowledge, RISC pipelines, TCL-based automation, C/C++ programming, data analysis with Python/Perl, matplotlib/pandas usage

Technologies

Siemens, Ansys Redhawk, Seascape, Cadence Voltus, PNR tools, STA tools

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