CareerPlanSign in

SoC Physical Design Engineer, PnR

San Jose, United States of America💼 Full-time🗓 2026-04-14 → 2026-09-28

Core

Physical implementation of design partitions from netlist to tapeout for highly complex SoCs.

Role type

SoC Physical Design Engineer (PnR)

Builds

SoC chips for Apple hardware products

Domain

Semiconductor / SoC Physical Design

Required skills

partition-level P&R, floorplanning, clock and power distribution, timing closure, physical verification, electrical verification, signoff closure, physical design flow methodology

Preferred skills

large SoC design experience (>20M gates), high-frequency design (>1GHz), sub-10nm technology node experience, industry standard tool expertise

Technologies

GDS2, sub-10nm process nodes, industry standard physical design tools

Sourced via apple · Listed on CareerPlan, which tracks 848,000+ jobs from 20+ sources.