CPU Physical Design Engineer
Core
Drive RTL-to-GDS design convergence and block-level physical design delivery for CPU blocks, ensuring closure of backend flows and electrical requirements.
Role type
Senior IC CPU Physical Design Engineer
Builds
CPU blocks and silicon chips
Domain
Semiconductor / CPU Design
Required skills
Logic synthesis, Place-and-route (PnR), Backend flow closure, Electrical requirements analysis, Silicon yield improvement, Perl scripting, TCL scripting, RTL-to-GDS convergence
Preferred skills
Low power design techniques, High frequency physical design, Advanced synthesis/PnR tool optimization, Timing budgeting, Floor-planning, Physical integration, Verification, Deep sub-micron technology knowledge
Technologies
Logic Synthesis tools, PnR tools, STA tools, Power analysis tools
Responsibilities
Drive RTL-to-GDS design convergence through logic synthesis and place-and-route tools; Responsible for block-level physical design delivery along with closure of backend flows; Work closely with internal CAD and PD methodology teams on tool features and optimizations; Collaborate with x-functional top-level teams on CPU floorplan, timing, power, reliability, and testability; Work with custom IP teams to define and co-optimize memory macros and library standard cells
Seniority
Senior, hands-on IC
