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SoC DFT DV Engineer

Cupertino, United States of America💼 Full-time🗓 2026-04-10 → 2026-09-28

Core

Verifying System-on-Chip (SoC) and large processor designs through DFT implementation, test bench creation, and silicon bring-up.

Role type

SoC DFT DV Engineer

Builds

SoC designs and large processors

Domain

Semiconductor hardware design

Required skills

DFT implementation, verification planning, gate-level simulation, coverage analysis, random verification, scripting (Perl/Python/TCL), bug debugging, test pattern development

Preferred skills

Large processor/SOC design experience, directed verification, assertions, logic design

Responsibilities

Review architecture and design specifications, develop verification plans, work with designers on DFT implementation, implement test benches and generate constrained random tests, debug failures and close coverage, support multi-functional engineering schedules, assist in verification flows and automation, bring up test patterns on silicon

Seniority

Entry-level (0 years experience required)

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